SR

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IEC / CEI 1131-3 Compliant

 

sr

 

This function represents a standard set-dominant set/reset flip flop. The Q1 output become TRUE when the input S1 is TRUE and the R input is FALSE. In the same way, the Q1 output become FALSE when the input S1 is FALSE and the R input is TRUE. After one of these transitions, when both the S1 and R signals return to FALSE, the Q1 output keeps the previous state until a new condition occours. If you apply a TRUE condition for both the signals, the Q1 output is forced to TRUE ( set-dominant ).

 

Net plugs

 

Plug

Description



S1

The SET-DOMINAT input

 

 

R

The RESET input

 

 

Q1

The FLIP-FLOP output

 

See also : RS, SEMA